高速有线通信系统(SerDes)

高速有线通信系统(SerDes)

研究方向一:高速SerDes PHY

主要研究PAM4/NRZ双模,多tap均衡,ADC/DAC based-TRX,数据率5-64Gbps的高速有线通信收发机设计。

代表性成果:

高速有线通信系统(SerDes)
4-Lanes PCIe4.0 PHY IP

研究方向二:存储接口PHY

主要研究高速率,高能效存储接口收发机电路设计。

代表性成果:

高速有线通信系统(SerDes)
LPDDR5/5X PHY

已发表论文

期刊论文

[MJ 2021]Li Ding, Ke Wu, Jing Jin, Jianjun Zhou,“An 8 GHz real-time temperature-compensated PLL with 20.8 ppm/°C temperature coefficient for SerDes applications,”Microelectronics Journal,Volume 117, 2021, 105279, ISSN 0026-2692.

[IEICE 2021]Li Ding, Jing Jin, Jianjun Zhou,” A 16/32 Gbps Dual-Mode SerDes Transmitter with Linearity Enhanced SST Driver, “IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Article ID 2021KEP0006, Advance online publication May 13, 2022, Online ISSN 1745-1337, Print ISSN 0916-8508,  https://doi.org/10.1587/transfun.2021KEP0006.

会议论文

[ISCAS 2018]H. Liu, L. Ding, J. Jin and J. Zhou, “A Reconfigurable 28/56 Gb/s PAM4/NRZ Dual-mode SerDes with Hardware-reuse,” 2018 IEEE International Symposium on Circuits and Systems (ISCAS), Florence, 2018, pp. 1-5.

[ISCAS 2018]H. Tang, L. Ding, J. Jin and J. Zhou, “A 28 Gb/s 2-Tap FFE Source-Series-Terminated Transmitter in 22 nm CMOS FDSOI,” 2018 IEEE International Symposium on Circuits and Systems (ISCAS), Florence, 2018, pp. 1-4.


[ICSICT 2020]Miao Bai, Xiaofei Wang, Jing Jin, Tingting Mo,” An Impedance Calibration Method Based on Temperature and Process Monitor for LPDDR5 Interface, “2020 15th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Kunming, pp. 1-3.

[ASICON 2019]Songhao Guo, Li Ding, and Jing Jin, “A 16/32Gb/s NRZ/PAM4 Receiver with Dual-Loop CDR and Threshold Voltage Calibration, “The IEEE 13th International Conference on ASIC, Oct. 29 – Nov. 1, 2019, Chongqing, China.

[ASICON 2019]Yu Ji, Li Ding, and Jing Jin,” A High-Linear Digital-to-Phase Converter in 40nm CMOS,” The IEEE 13th International Conference on ASIC, Oct. 29 – Nov. 1, 2019, Chongqing, China.

[ICSICT 2018]Y. Kong, L. Ding and J. Jin, “A Multiplexed Low Power and High Linearity Cascaded Phase Interpolator Design,” 2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Qingdao, 2018, pp. 1-3.

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