论文发表
国际学术期刊论文
| 2023 | Yuekang Guo, Jing Jin*, Xiaoming Liu, and Jianjun Zhou, “A 60MS/s 5MHz-BW Noise-Shaping SAR ADC with Integrated Input Buffer Achieving 84.2dB-SNDR and 97.3dB-SFDR Using Dynamic Level-Shifting and ISI-Error Correction,” in IEEE Journal of Solid-State Circuits, vol. 58, no. 2, pp. 474-485, Feb. 2023, doi:10.1109/JSSC.2022.3185501. (Grant Number: 61974092 and 62122051) |
| Y. Guo, J. Jin*, X. Liu and J. Zhou, “A 372 μW 10 kHz-BW 109.2 dB-SNDR Nested Delta-Sigma Modulator Using Hysteresis-Comparison MSB-Pass Quantization,” in IEEE Journal of Solid-State Circuits, vol. 58, no. 9, pp. 2554-2563, Sept. 2023, doi:10.1109/JSSC.2023.3262300. (Grant Number: 2020YFB1807300 and 62122051) | |
| M. Lee, X. Liu*, Z. Yang, J. Jin and L. -S. W, “A Compact 0.2-1.6 GHz 20 MHz-Bandwidth Passive-LNA Exploiting an N-Path 1:3 Transformer,” in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 70, no. 5, pp. 1699-1703, May 2023, doi:10.1109/TCSII.2023.3257880. (Grant Number: N-XK-XK-1102-202209-5725，62122051) | |
| X. Liu et al, “Area-Efficient 28-GHz Four-Element Phased-Array Transceiver Front-End Achieving 25.2% Tx Efficiency at 15.68-dBm Output Power,” in IEEE Transactions on Microwave Theory and Techniques, vol. 71, no. 2, pp. 654-668, Feb. 2023, doi: 10.1109/TMTT.2022.3207990. (Grant Number: 2019YFB2204603, 62122051) | |
| 2022 | Y. Guo, J. Jin*, X. Liu and J. Zhou, “An 18.1 mW 50 MHz-BW 76.4 dB-SNDR CTSDM With PVT-Robust VCO Quantizer and Latency-Free Background-Calibrated DAC,” in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 69, no. 12, pp. 4787-4798, Dec. 2022, doi: 10.1109/TCSI.2022.3192465. (Grant Number: 61974092 and 62122051) |
| C. Yang, X. Liu*, J. Jin, Y. Guo and J. Zhou, “A Fast-Settling Phase-Locked Loop Utilizing Cycle-Slipping-Elimination PFDCP,” in IEEE Transactions on Circuits and Systems II: Express Briefs,vol. 69, no. 10, pp. 3998-4002, Oct. 2022, doi: 10.1109/TCSII.2022.3177763. (Grant Number: 20ZR1425900, 62122051) | |
| Chao Yang, Xiaoming Liu*, Jing Jin, Jianjun Zhou, “A 0.023–12 GHz ultra-wideband frequency synthesizer with FOMT of −251.8 dB,” in Microelectronics Journal, Volume 120, 2022, 105357, ISSN 0026-2692. (Grant Number: 20ZR1425900) | |
| Bu, R. , Jin, J.* , Yang, Z. , Guo, Y. , & Zhou, J., “A Harmonic Rejecting N-Path Filter with Harmonic Gain Calibration Technique,” in Circuits Syst Signal Process 41, 6672–6693 (2022), https://doi.org/10.1007/s00034-022-02118-z. (Grant Number: 20ZR1425900, USCAST2020-30) | |
| 2021 | Li Ding, Ke Wu, Jing Jin, Jianjun Zhou*, “An 8 GHz real-time temperature-compensated PLL with 20.8 ppm/°C temperature coefficient for SerDes applications,” in Microelectronics Journal, Volume 117, 2021, 105279, ISSN 0026-2692. (Grant Number: 2019YFB2204603, 61774103) |
| Li Ding, Jing Jin, Jianjun Zhou, “A 16/32 Gbps Dual-Mode SerDes Transmitter with Linearity Enhanced SST Driver,” in IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences, Article ID 2021KEP0006, Advance online publication May 13, 2022, Online ISSN 1745-1337, Print ISSN 0916-8508, https://doi.org/10.1587/transfun.2021KEP0006. (Grant Number: 2019YFB2204603) | |
| X. Liu, J. Jin*, C. Yang, Y. Liu and J. Zhou, “A 12GHz Transformer Feedback Class-F2,3 Voltage-Controlled Oscillator Using Noise Circulating with FoM of 190.5dBc/Hz,” in IEEE Microwave and Wireless Components Letters, vol. 31, no. 11, pp. 1231-1234, Nov. 2021, doi: 10.1109/LMWC.2021.3091978. (Grant Number: 2019YFB2204603, 61774103) | |
| H. Ghaedrahmati*, J. Zhou and R. B. Staszewski, “A 38.6-fJ/Conv.-Step Inverter-Based Continuous-Time Bandpass ΔΣ ADC in 28 nm Using Asynchronous SAR Quantizer,” in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 68, no. 9, pp. 3113-3117, Sept. 2021, doi: 10.1109/TCSII.2021.3089831. (Grant Number: 14/RP/I2921, UMO-2017/27/B/ST7/01217) | |
| M. Hu, J. Jin, Y. Guo, X. Liu and J. Zhou, “A Power-Efficient SAR ADC with Optimized Timing-Redistribution Asynchronous SAR Logic in 40-nm CMOS,” in Circuits Syst. Signal Process 40, 3125–3142 (2021). https://doi.org/10.1007/s00034-020-01643-z. (Grant Number: 61974092) | |
| H. Kang, J. Jin*, X. Liu, X. Wang, P. Hong and J Zhou*, “A fully integrated multiphase switched-capacitor DC-DC converter with PFM control and charge sharing loss reduction,” in Microelectronics Journal, Volume 108, 2021, 104991, ISSN 0026-2692, https://doi.org/10.1016/j.mejo.2021.104991. (Grant Number: 61974092 and 61774103) | |
| Z. Yang, J. Jin*, X. Liu, T. Yan, X. Yu and J. Zhou, “A Sub-1-GHz Band High-Dynamic-Range Receiver With Integrated Self-Adaptive Multipart AGC Loops,” in IEEE Transactions on Microwave Theory and Techniques, vol. 69, no. 6, pp. 3146-3157, June 2021. (Grant Number: 61774103 and 61974092) | |
| X. Liu, J. Jin, X. Wang and J Zhou*, “A 2.4 GHz receiver with a current-reused inductor-less noise-canceling balun LNA in 40 nm CMOS,” in Microelectronics Journal, Vol. 113, 2021.(Grant Number: 61774103) | |
| 2020 | Y. Guo, J. Jin, X. Liu and J. Zhou, “An Inverter-Based Continuous Time Sigma Delta ADC With Latency-Free DAC Calibration,” in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 67, no. 11, pp.3630-3642, Nov. 2020.(Grant Number: 2018ZX03001005-003, 61974092) |
| L. Liu, J. Jin, X. Liu and J. Zhou, “A Multi-Modulus Fractional Divider With TDC Free Calibration Scheme for Mitigation of TX-VCO Pulling,” in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 67, no. 12, pp. 2848-2852, Dec. 2020, doi: 10.1109/TCSII.2020.2983785.(Grant Number: 61774103) | |
| X. Wang, J. Jin, X. Liu and J. Zhou, “An ISM Band High-Linear Current-Reuse Up-Conversion Mixer With Built-in-Self-Calibration for LOFT and I/Q Imbalance,” in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 67, no. 12, pp. 2898-2902, Dec. 2020, doi: 10.1109/TCSII.2020.2981940.(Grant Number: 61774103) | |
| X. Liu, J. Jin, J. Shi and J. Zhou, “Comparator Offset Immune I/Q Calibration Technique for Direct Conversion Receiver,” in IEEE Microwave and Wireless Components Letters, vol. 30, no. 1, pp. 109-111, Jan. 2020.(Grant Number: 61774103) | |
| 2019 | J. Jin, X. Liu and J. Zhou, “A 0.25-dB-Step, 68-dB-Dynamic Range Analog Baseband With Digitally Assisted DCOC and AGC for Multi-Standard TV Applications,” in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 66, no. 10, pp. 1623-1627, Oct. 2019. |
| J. Jin, X. Liu, T. Yan and J. Zhou, “Fully Configurable Capacitor-Less Oversampling DC Offset Cancellation for Direct Conversion Receivers,” in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 66, no. 10, pp. 1683-1687, Oct. 2019. | |
| Li Taozhong, Wang Qin, Zhu Yongxin, Jiang Jianfei, He Guanghui, Jin Jing, Mao Zhigang, Jing Naifeng, “A Novel Resistive Memory-based Process-in-memory Architecture for Efficient Logic and Add Operations,” ACM Transactions on Design Automation of Electronic Systems (TODAES), vol. 24, no. 2, Article Number: 25, March, 2019. | |
| 2018 | R. Guan, J. Xue, C. Yang, J. Jin and J. Zhou, “16-bit 1-MS/s SAR ADC with foreground digital-domain calibration,” in IET Circuits, Devices & Systems, vol. 12, no. 4, pp. 505-513, 7 2018. |
| Rui Guan, Jing Jin, Jianjun Zhou, “A low-cost digital-domain foreground Calibration for high resolution SAR ADCs,” Microelectronics Journal, vol. 73, pp.86-93, Jul. 2018. | |
| H. Ghaedrahmati and J. Zhou, “160 MS/s 20 MHz bandwidth third-order noise shaping SAR ADC,” in Electronics Letters, vol. 54, no. 3, pp. 128-130, 8 2 2018. | |
| Yuke Zhang, Kamal El-Sankary, and Jianjun Zhou, “A Blind Digital Background Calibration for All-digital VCO-Based ADC,” Analog Integrated Circuits and Signal Processing, Vol 97, Issue 2, pp 387-394, Nov. 2018. | |
| Jin Jing, Yang Zhaolin, Liu Litong, Zhou Jianjun,”Fully-Integrated Reconfigurable CMOS Global Navigation Satellite System Receivers with High-Linearity”,Journal of Shanghai Jiaotong University,vol. 52, no. 10, pp1226-1233, Oct. 2018. | |
| 2016 | Z. Lu, J. Jin, T. Mo and J. Zhou, “Analysis of Input LCR Matched N-Path Filter,” in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 63, no. 6, pp. 795-805, June 2016. |
| R. Guan, J. Jin, , et al “Wideband dual-mode complementary metal–oxide–semiconductor receiver,” in IET Circuits, Devices & Systems, vol. 10, no. 2, pp. 87-93, 3 2016. | |
| Z. Lu, R. Guan, X. Li and J. Zhou, “A Practical Design of X-Band Receiver Front-End in 65-nm CMOS,” in Chinese Journal of Electronics, vol. 25, no. 3, pp. 413-417, 5 2016. | |
| Huang Jianhua, Yu Xiaopeng，Xu Shiyi，Jin Jing，Yu Faxin，“19.1 GHz 18 mW divide-by-3 heterodyne injection locking frequency divider in 0.18 mu m CMOS technology” Electronics Letters, vol. 52, no. 12, pp. 1076-1077，JUN 2016 | |
| 2015 | Lu Zhijian, Pan Xingpeng, Zhou Jianjun, Integrated CMOS edge voltage quantizer for detection of low-frequency simple waveforms, IEICE Electronics Express, 2015, Volume 12, Issue 23, Pages 20150898, Released December 10, 2015 |
| K. Wang, C. Fan, et al, “Nonlinearity Calibration for Pipelined ADCs by Splitting Capacitors with Self-Tracking Comparator Thresholds,” in Chinese Journal of Electronics, vol. 24, no. 3, pp. 474-479, 07 2015. | |
| Ke Wang, Chaojie Fan, et al,“A 14-bit 100 MS/s SHA-less pipelined ADC with 89 dB SFDR and 74.5 dB SNR,” IEICE Electronics Express, 2015, 12: 20150070. | |
| 2014 | Peng Qin, Hao Yan, Yangyang Zhou, Xiaoyong Li, Jianjun Zhou, Phase noise suppression techniques for high frequency synthesizers in 65 nm CMOS, IEICE Electronics Express, 2014, Volume 11, Issue 24, Pages 20141062, Released December 25, 2014 |
| Fan Chaojie, Wang Ke, et al, Nonlinear inter-stage gain calibration for pipelined ADCs employing double dithering modes, IEICE Electronics Express, 2014, Volume 11, Issue 23, Pages 20140995, Released December 10, 2014 | |
| Peng Qin, Jinbo Li, Jian Kang, Xiaoyong Li and Jianjun Zhou, “Low Noise Frequency Synthesizer with Self-calibrated Voltage Controlled Oscillator and accurate AFC algorithm,” Journal of Semiconductors, Volume 35,Issue 9,Pages 095007,September 2014 | |
| Peng Qin, Yangyang Zhou, Hao Yan, Xiaoyong Li, Jianjun Zhou, A fast and efficient automatic frequency calibration technique for 10 GHz PLLs, IEICE Electronics Express, 2014, Volume 11, Issue 19, Pages 20140845, Released October 11, 2014, | |
| Yuxiao Lu, Chaojie Fan, Lu Sun, Zhe Li, Jianjun Zhou, A fast low power window-opening logic for high speed SAR ADC, IEICE Electronics Express, 2014, Volume 11, Issue 14, Pages 20140454, Released July 25, 2014, | |
| Fan Chaojie, Lu Yuxiao, Wang Ke, Zhou Jianjun, Digital nonlinearity calibration for pipelined ADCs using sampling capacitors splitting, IEICE Electronics Express, 2014, Volume 11, Issue 13, Pages 20140442, Released July 10, 2014, | |
| J. Jin, X. Yu, X. Liu, W. M. Lim and J. Zhou, “A Wideband Voltage-Controlled Oscillator With Gain Linearized Varactor Bank,” in IEEE Transactions on Components, Packaging and Manufacturing Technology, vol. 4, no. 5, pp. 905-910, May 2014. | |
| LU Yuxiao, SUN Lu, LI Zhe, ZHOU Jianjun, “A single-channel 10-bit 160MS/s SAR ADC in 65nm CMOS,” Journal of Semiconductors, 35(4), pages 045009，Apr. 2014. | |
| 2013 | Yuxiao Lu, Zhe Li, Jianjun Zhou, A full-swing area-efficient high-speed CMOS bootstrapped sampling switch, IEICE Electronics Express, 2013, Volume 10, Issue 12, Pages 20130336, Released June 25, 2013 |
| Wang Ke, Fan Chaojie, Zhou Jianjun, et al(2013). A 14-bit 100-MS/s CMOS pipelined ADC with 113 ENOB. Journal of Semiconductors, 34(8), 5. doi:101088/1674-4926/34/8/085015 | |
| Peichen Jiang, Rui Guan, and Jianjun Zhou, “Low power SAW-less WCDMA transmitter with quadrature driver amplifier and injection-locked frequency divider,” Microwave and Optical Technology Letters,Volume 55,Issue:6,Pages: 1217-1221 June 2013. | |
| P. Jiang, Z. Lu, R. Guan and J. Zhou, “All-Digital Adaptive Module for Automatic Background IIP2 Calibration in CMOS Downconverters With Fast Convergence,” in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 60, no. 7, pp. 427-431, July 2013. | |
| Y. Taotao, W. Hui, L. Jinbo, and Z. Jianjun, “A digitally calibrated CMOS RMS power detector for RF automatic gain control,” Journal of Semiconductors,Volume 34 ,Issue 3,Pages: 035001,March 2013 | |
| 2012 | Chaojie Fan, Tingting Mo, et al, “A Reconfigurable Complex Band-Pass Filter with Improved Passive Compensation”, Journal of Semiconductors,Volume: 33 ,Issue: 12 ,Pages: 125004,December, 2012. |
| Jiang Peichen, Guan Rui, Wang Wufeng, et al, “A High Linearity Downconverter for SAW-less LTE Receivers”, Journal of Semiconductors, vol. 33, no. 10, October 2012. | |
| J. Jin, X. Liu, T. Mo and J. Zhou, “Quantization Noise Suppression in Fractional-N PLLs Utilizing Glitch-Free Phase Switching Multi-Modulus Frequency Divider,” in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 59, no. 5, pp. 926-937, May 2012. | |
| T. T. Yan, X. B. Shen, J. Jin and J. J. Zhou, “Area-efficient programmable switched-capacitor-based peak detector,” in Electronics Letters, vol. 48, no. 3, pp. 146-148, 2 February 2012. | |
| Baohong Liu, Jianjun Zhou, and Junfa Mao, “Design of a 0.5 V CMOS cascode low noise amplifier for multi-gigahertz applications”, Journal of Semiconductors,Volume 33,Issue, 1,Pages: 015006,January 2012. | |
| 2011 | J. Wu, P. Jiang, et al, “A Dual-Band GNSS RF Front End With a Pseudo-Differential LNA,” in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 58, no. 3, pp. 134-138, March 2011. |
| Baohong Liu, Jianjun Zhou, and Junfa Mao, “A fully integrated low voltage (0.5 V) X-band CMOS low noise amplifier”, Microwave and Optical Technology Letters, vol. 53, issue 1, pp.17-20, January 2011. | |
| 2010 | Dai Xuan, Jing Jin, Weicheng Zhang, Jianjun Zhou, “ Design of Frequency Resolution Enhanced Digitally Controlled Oscillator ”, Journal of Shanghai Jiao Tong University, vol 44, no 2, pp. 218-222, Feb. 2010. |
| 2008 | J. Jin, X.P. Yu, J.J. Zhou and T.T. Yan, “Gigahertz range injection locked frequency dividers with band-width enhancement and supply rejection,” Electronics Letters, vol. 44, pp. 999-1000, August 2008. |
| 2007 | Ting Ting Mo, Quan Xue, and Chi Hou Chan，“A broadband compact microstrip rat-race hybrid using a novel CPW inverter ”，IEEE Trans. Microw. Theory Tech., vol.55 no.1, pp.161-167, Jan. 2007. |
| 2005 | Xiaoyong Li, S. Shekhar and D. J. Allstot, “G/sub m/-boosted common-gate LNA and differential colpitts VCO/QVCO in 0.18-/spl mu/m CMOS,” in IEEE Journal of Solid-State Circuits, vol. 40, no. 12, pp. 2609-2619, Dec. 2005. (Top 100 documents accessed by IEEEXplore in December 2005) |
| W. Zhuo et al., “A capacitor cross-coupled common-gate low-noise amplifier,” in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 52, no. 12, pp. 875-879, Dec. 2005. | |
| Kam Man Shum, Ting Ting Mo, Quan Xue and Chi Hou Chan, “A compact bandpass filter with two tuning transmission zeros using a CMRC resonator,” in IEEE Transactions on Microwave Theory and Techniques, vol. 53, no. 3, pp. 895-900, March 2005. | |
| 2004 | Taeik Kim, Xiaoyong Li and D. J. Allstot, “Compact model generation for on-chip transmission lines,” in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 51, no. 3, pp. 459-470, March 2004. |
| 1998 | J. J. Zhou and D. J. Allstot, “Monolithic transformers and their application in a differential CMOS RF low-noise amplifier,” in IEEE Journal of Solid-State Circuits, vol. 33, no. 12, pp. 2020-2027, Dec. 1998. |
会议论文Ⅰ
| 2023 | Yuekang Guo，Jing Jin, Xiaoming Liu, Zhaolin Yang, Jianjun Zhou, “A LUT-Based Background Linearization Technique for VCO-Based ADC Employing KVCO-Locked-Loop,” in 2023 IEEE International Symposium on Circuits and Systems (ISCAS), Monterey, CA, USA, 2023, pp. 1-4, doi: 10.1109/ISCAS46773.2023.10181646. (Grant Number: 61974092 and 62122051) |
| Xiaofei Wang, Jing Jin, Xiaoming Liu, Zhaolin Yang, Shan Wang, Jianjun Zhou, “A 16/32-Gb/s/Pin Dual-Mode Single-Ended Transmitter with Pre-Emphasis FFE and RLM-Enhanced ZQ Calibration for Memory Interfaces,” in 2023 IEEE International Symposium on Circuits and Systems (ISCAS), Monterey, CA, USA, 2023, pp. 1-4, doi: 10.1109/ISCAS46773.2023.10181851. (Grant Number: 2019YFB2204603) | |
| Huzhi Tang, Xiaoming Liu, Chao Yang, Jing Jin, “An ADPLL with Two-Point Modulation Gain Calibration for 2.4GHz ISM-Band in 40nm CMOS,” in 2023 IEEE International Symposium on Circuits and Systems (ISCAS), Monterey, CA, USA, 2023, pp. 1-4, doi: 10.1109/ISCAS46773.2023.10181799. (Grant Number: 62122051) | |
| Chen Jiayi, Liu Xiaoming*, Yang Chao, Jin Jing, Chang Zhongyuan, Zhou Jianjun, “Predictive LSB-First Successive Approximation for SAR Analog-To-Digital Converters,” in 2023 IEEE 66th International Midwest Symposium on Circuits and Systems (MWSCAS). (Grant Number: 62122051) | |
| Wang Shunyan, Guo Yuekang, Pan Qiang, Liu Xiaoming, Wang Shan, Jin Jing*, “A Fully Synthesizable Dynamic Voltage Comparator with Time-Domain Offset Calibration,” in 2023 IEEE 66th International Midwest Symposium on Circuits and Systems (MWSCAS). (Grant Number: 2019YFB2204603) | |
| Wu Ke, Yuekang Guo, Liu Xiaoming, Jin Jing, Yang Howard C., Zhou Jianjun*, “A Non-Linearity Digital Background Calibration Algorithm with Piece-Wise Linear Functions,” in 2023 IEEE 66th International Midwest Symposium on Circuits and Systems (MWSCAS). (Grant Number: 2020YFB1807301) | |
| 2022 | K. Wu, Y. Guo, J. Jin, X. Liu and J. Zhou, “A Power-Efficient CMOS Image Sensor with In-Sensor Processing and In-Pixel Gain Calibration,” 2022 IEEE 65th International Midwest Symposium on Circuits and Systems (MWSCAS), 2022, pp. 1-4, doi:10.1109/MWSCAS54063.2022.9859418. (Grant Number: 20ZR1425900, 62122051) |
| Y. Guo, X. Liu, J. Jin and J. Zhou, “A 3bit/cycle 1GS/s 8-bit SAR ADC Employing Asynchronous Ping-Pong Quantization Scheme,” 2022 IEEE International Symposium on Circuits and Systems (ISCAS), 2022, pp. 2650-2654, doi:10.1109/ ISCAS48785. 2022.9937630. (Grant Number: 62122051, USCAST2020-30) | |
| C. Yang, X. Liu, W. Tao, Y. Guo and J. Jin, “A 77 GHz 4-Way Power Amplifier with 20.2 dBm Output Power in 40 nm CMOS,” 2022 IEEE MTT-S International Wireless Symposium (IWS), Harbin, China, 2022, pp. 1-3, doi: 10.1109/IWS55252.2022.9977554. (Grant Number: 62122051, USCAST2020-30) | |
| R. Bu, Z. Yang, X. Liu and J. Jin, “A Blocker Tolerant N-path Filter with Tunable Notches for Software-Defined Radio Applications,” 2022 IEEE 4th International Conference on Circuits and Systems (ICCS), 2022, pp. 155-159, doi: 10.1109/ ICCS56666.2022.9936140.(Grant Number: 20ZR1425900) | |
| 2021 | Q. Pan, Y. Guo, J. Jin and J. Zhou, “A Linearization Technique for Ring VCO Exploiting Bulk-Modulation,” 2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), Lansing, MI, USA, 2021, pp. 737-740.(Grant Number: 61974092) |
| Y. Guo, J. Jin and J. Zhou, “A Low Power PVT Stabilization Technique for Dynamic Amplifier in Pipelined SAR ADC,” 2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), Lansing, MI, USA, 2021, pp. 18-21.(Grant Number: 2020YFB1807301) | |
| Y. He, Y. Guo, J. Jin and J. Zhou, “A Latency-Optimized Lookup Table for Nonlinearity Calibration in VCO-Based Sigma-Delta ADCs,” 2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), Lansing, MI, USA, 2021, pp. 941-944.(Grant Number: 61974092) | |
| Y. Guo, Q. Pan, X. Liu and J. Jin, “A Center Frequency Calibration Technique for Ring VCO Exploiting Delay−1 Detection,” 2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), Lansing, MI, USA, 2021, pp. 708-711.(Grant Number: 61974092) | |
| K. Wu, C. Shi, Y. Li, C. Gu and J. Jin, “An Adaptive Kalman Filter based Digital Phase Detector for All Digital Phase-Locked Loop,” IEEE MTT-S International Wireless Symposium (IWS), 2021.(Grant Number: 2019YFB2204603, 61774103) | |
| X. Liu, J. Jin and J Zhou, “A Wideband Noise-Cancelling Balun Low Noise Amplifier with SelfAdaptive Calibration for Low Power Application,” IEEE MTT-S International Wireless Symposium (IWS), 2021.(Grant Number: 20ZR1425900) | |
| Z. Xu, K. Wu, X. Liu, J. Jin and J Zhou, “A 24 GHz MIMO PMCW Automotive Radar with Doppler Compensation,” IEEE MTT-S International Wireless Symposium (IWS), 2021.(Grant Number: 2019YFB2204603, 61774103) | |
| Y. Guo, J. Jin, X. Liu and J. Zhou, “A Phase Domain Excess Loop Delay Compensation Technique with Latency Optimized Phase Selector for VCO-based Continuous-Time ΔΣ ADC,” 2021 IEEE International Symposium on Circuits and Systems (ISCAS), 2021, pp. 1-4, doi: 10.1109/ISCAS51556.2021.9401304.(Grant Number: 61974092) | |
| Z. Xu, K. Wu, X. Liu, C. Liu, J. Jin and J. Zhou, “A Ka-band Quadrature-Hybrid LNA-PS with Gm-Boosting Technique in 40-nm CMOS,” 2021 IEEE International Symposium on Circuits and Systems (ISCAS), 2021, pp. 1-5, doi: 10.1109/ISCAS51556.2021.9401264.(Grant Number: 2019YFB2204603) | |
| 2020 | Yuan Liu, Chao Yang, Liaoming Liu, and Jing Jin, A Wideband Low Phase Noise 20GHz Class-F VCO in 14nm FinFET CMOS Technology, IEEE 2020 Asia-Pacific Microwave Conference (APMC), 8-11, Dec., 2020, Hong Kong SAR, PR China.(Grant Number: 2019YFB2204603) |
| Jiawang Li, Xiaoming Liu, Jing Jin, and Jianjun Zhou, Analysis and Verification of a 60-GHz Single-Antenna Doppler Radar for Vital Sign Detection, IEEE 2020 Asia-Pacific Microwave Conference (APMC), 8-11, Dec., 2020, Hong Kong SAR, PR China.(Grant Number: 2019YFB2204603) | |
| R. Wang, Y. Guo, J. Jin, X. Liu, N. Jing and J. Zhou, “A Low Power Temperature-Compensated Common-Mode Voltage Detector for Dynamic Amplifiers,” 2020 IEEE International Symposium on Circuits and Systems (ISCAS), Sevilla, 2020, pp. 1-4, doi: 10.1109/ISCAS45731.2020.9180689.(Grant Number: 61974092)) | |
| T. Hong et al., “Decoupling the Multi-Rate Dataflow Execution in Coarse-Grained Reconfigurable Array,” 2020 IEEE International Symposium on Circuits and Systems (ISCAS), Sevilla, 2020, pp. 1-5, doi: 10.1109/ISCAS45731.2020.9181275.(Grant Number: 61772331, 2018YFA0701500) | |
| Y. Shen, Y. Guo, H. Gao and J. Jin, “A Fourth-Order Feedforward Inverter-Based Amplifier for Wideband CT ΔΣ Modulator,” 2020 IEEE MTT- S International Wireless Symposium (IWS), Shanghai, 2020, pp. 1-3.(Grant Number: 61974092) | |
| M. Wen, L. Ding, X. Wang, J. Jin, and T. Mo, “A 50 Gb/s Serial Link Receiver With Inductive Peaking CTLE and 1-Tap Loop-Unrolled DFE in 22nm FDSOI CMOS,” 2020 IEEE MTT- S International Wireless Symposium (IWS), Shanghai, 2020, pp. 1-3.(Grant Number: 61774103) | |
| 2019 | T. He, G. Wang, K. Yousef and J. Jin, “A High Conversion Gain Wideband Mixer Design for UWB Applications,” 2019 IEEE International Symposium on Circuits and Systems (ISCAS), Sapporo, Japan, 2019, pp. 1-4. |
| Sijie Zheng, Hongjun You, Guanghui He, Qin Wang, Tao Si, Jianfei Jiang, Jing Jin, Naifeng Jing， “A Rapid Scrubbing Technique for SEU Mitigation on SRAM-Based FPGAs,” 2019 IEEE International Symposium on Circuits and Systems (ISCAS), Sapporo, Japan, 2019, pp. 1-5. | |
| Q. Wu, X. Li, X. Yu and J. Jin, “A Ka-Band Class-C BiCMOS VCO with Temperature Compensation,” 2019 IEEE Asia-Pacific Microwave Conference (APMC), December, 2019, Singapore, pp. 1682-1684. | |
| Yuekang Guo, Jing Jin, Xiaoming Liu, Xiaopeng Yu, and Jianjun Zhou, A PVT Compensated Ring VCO with FVC-Assisted Digital Background Calibration, IEEE 2019 Asia-Pacific Microwave Conference (APMC), December, 2019, Singapore, pp. 48-50. | |
| Bo Xie, Li Ding, Jing Jin, and Jianjun Zhou, A 16/32 Gb/s Dual-Mode Transmitter with Eye Level Pre-Distortion in 22nm CMOS FDSOI, IEEE 2019 Asia-Pacific Microwave Conference (APMC), December, 2019, Singapore, pp. 360-2. | |
| X. Fu, K. El-Sankary and J. Zhou, “A high speed, high conversion gain RF envelope detector for SRO-receivers,” 2019 IEEE 62nd International Midwest Symposium on Circuits and Systems (MWSCAS), Dallas, TX, USA, 2019, pp. 1029-1032. | |
| 2018 | H. Tang, L. Ding, J. Jin and J. Zhou, “A 28 Gb/s 2-Tap FFE Source-Series-Terminated Transmitter in 22 nm CMOS FDSOI,” 2018 IEEE International Symposium on Circuits and Systems (ISCAS), Florence, 2018, pp. 1-4. |
| H. Liu, L. Ding, J. Jin and J. Zhou, “A Reconfigurable 28/56 Gb/s PAM4/NRZ Dual-mode SerDes with Hardware-reuse,” 2018 IEEE International Symposium on Circuits and Systems (ISCAS), Florence, 2018, pp. 1-5. | |
| H. Ghaedrahmati, J. Zhou and L. Shi, “Gain-boosted Complementary Dynamic Residue Amplifier for a 160 MS/s 61 dB SNDR Noise-Shaping SAR ADC,” 2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS), Windsor, ON, Canada, 2018, pp. 141-144. | |
| 2017 | X. Gao, L. Xu, J. Jin, N. Jing and J. Zhou, “A wideband simplified transformer-based VCO with digital amplitude calibration,” 2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS), Boston, MA, 2017, pp. 787-790. |
| 2015 | Xuan Li, Shuo Huang, Jianjun Zhou and Xiaoyong Li, “A 12-bit 20-MS/s SAR ADC with improved internal clock generator and SAR controller,” 2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS), Fort Collins, CO, 2015, pp. 1-4. |
| 2014 | J. Jin, B. Pan, X. Liu and J. Zhou, “Digital spur calibration of multi-modulus fractional frequency LO divider utilizing most correlated comparison algorithm,” 2014 IEEE International Symposium on Circuits and Systems (ISCAS), Melbourne VIC, 2014, pp. 742-745. |
| J. Jin, B. Pan, X. Liu and J. Zhou, “Injection-Locking Frequency Divider based dual-modulus prescalers with extended locking range,” 2014 IEEE International Symposium on Circuits and Systems (ISCAS), Melbourne VIC, 2014, pp. 502-505. | |
| 2012 | H. Wang, W. Wang, J. Jin, et al, “Anti-interference pseudo-differential wideband LNA for DVB-S.2 RF tuners,” 2012 IEEE International Symposium on Circuits and Systems (ISCAS), Seoul, 2012, pp. 2151-2154. |
| J. Li, et al, “Low-power high-linearity area-efficient multi-mode GNSS RF receiver in 40nm CMOS,” 2012 IEEE International Symposium on Circuits and Systems (ISCAS), Seoul, 2012, pp. 1291-1294. | |
| 2011 | Z. Lu, P. Jiang, T. Mo and J. Zhou, “Adaptive calibration of IIP2 in direct down-conversion mixers with modified LMS algorithm,” 2011 IEEE International Symposium of Circuits and Systems (ISCAS), Rio de Janeiro, 2011, pp. 542-545. |
| X. Liu, J. Jin, C. Mao and J. Zhou, “Linear range extensible Phase Frequency Detector and Charge Pump for fast frequency acquisition,” 2011 IEEE International Symposium of Circuits and Systems (ISCAS), Rio de Janeiro, 2011, pp. 985-988. | |
| X. Liu, J. Jin, X. Li and J. Zhou, “Glitch-Free Multi-Modulus Frequency Divider for Quantization Noise suppression in fractional-N PLLs,” 2011 IEEE International Symposium of Circuits and Systems (ISCAS), Rio de Janeiro, 2011, pp. 478-481. | |
| 2008 | Xiaopeng Yu, Jianjun Zhou, Xiaolang Yan, Wei Meng Lim, Manh Anh Do and Kiat Seng Yeo, “Sub-mW multi-GHz CMOS dual-modulus prescalers based on programmable injection-locked frequency dividers,” 2008 IEEE Radio Frequency Integrated Circuits Symposium, Atlanta, GA, 2008, pp. 431-434. |
| 2006 | S. Shekhar, X. Li and D.J. Allstot, “A CMOS 3.1-10.6GHz UWB LNA Employing Stagger-Compensated Series Peaking,” IEEE Radio Frequency Integrated Circuits Symposium (RFIC), pp. 63-66, June 2006. |
| 2005 | Jianjun Zhou, et. al., “A Highly-Integrated CMOS Zero-IF Transmitter for Cellular CDMA Application,” IEEE Radio Frequency Integrated Circuits Symposium (RFIC), June 2005, pp. 17-20. |
| D.J. Allstot, S. Aniruddhan, G. Banerjee, M. Chu, X. Li, J. Paramesh, S. Shekhar, and K. Soumyanath, “Circuit Techniques for CMOS Multiple-Antenna Transceivers,” IEEE Radio Frequency Integrated Circuits Symposium (RFIC), pp. 225-228, June 2005. | |
| X. Li, S. Shekhar and D.J. Allstot, “Low-Power Gm-Boosted LNA and VCO Circuits in 0.18-um CMOS, ” Proc. IEEE International Solid-State Circuits Conference (ISSCC), pp. 534-535, February 2005. | |
| 2004 | D.J. Allstot, X. Li and S. Shekhar, “Design Considerations for CMOS Low-Noise Amplifiers,” IEEE Radio Frequency Integrated Circuits Symposium (RFIC), pp. 97-100, June 2004. |
| 2003 | T. Kim, X. Li, and D.J. Allstot, “Accurate Compact Model Extraction for On-Chip Coplanar Wave-guides,” IEEE International Symposium on Circuits and Systems (ISCAS), pp. 644-647, May 2003. |
| J. Shorb, X. Li, and D.J. Allstot, “A Resonant Pad for ESD Protected Narrowband CMOS RF Applications,” IEEE International Symposium on Circuits and Systems (ISCAS), pp. 61-64, May 2003. | |
| K. Gard, K. Barnett, J. Dunworth, T. Segoria, B. Walker, J. Zhou, et. al., “Direct Conversion Dual-Band SiGe BiCMOS Transmitter and Receive PLL IC for CDMA/WCDMA/AMPS/GPS Applications,” IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2003, pp. 272-273. | |
| 2002 | Vladimir Aparin, Pete Gazzerro, Jianjun Zhou, et. al., “A Highly-Integrated Tri-Band/Quad-Mode SiGe BiCMOS RF-to-Baseband Receiver For Wireless CDMA/WCDMA/AMPS Applications with GPS Capability,” IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2002, pp. 234-235. |
| 1998 | Jianjun Zhou, David Allstot, “A Fully-Integrated CMOS 900MHz LNA Utilizing Monolithic Transformers,” IEEE International Solid-State Circuits Conference (ISSCC), Feb. 1998, pp. 132-133. |
会议论文Ⅱ
| 2023 | Shengyuan Zhou, Chao Yang*, Sheng Wang, Ziyao Xia, Xiaoming Liu, Jing Jin, Fast locking Sampling PLL Using Phase Error Eliminator, 2023 IEEE 15th International Conference on ASIC (ASICON).(Grant Number: 2019YFB62122051 ) |
| Weizhen Cai, Xiaobo Chen, Xiaoming Liu, Jianjun Zhou*, “A High Precision CMOS Temperature Detector with Curvature Calibration Technique”, 2023 IEEE 15th International Conference on ASIC (ASICON).(Grant Number: N-XK-XK-1102-202209-5725) | |
| Hanqi Gao, Zhaolin Yang, Xiaoming Liu*, Jing Jin, Jianjun Zhou, “A 30GHz Bidirectional PA/LNA with TransformerBased Switchable RC Matching Network”, 2023 IEEE 15th International Conference on ASIC (ASICON).(Grant Number: 62122051) | |
| Zhaolin Yang, Yuyang Chen, Xiaoming Liu*, Jing Jin, Jianjun Zhou, “A Wideband Inductorless LNA Employing DualLoop Feedback for Low-Power Applications”, 2023 IEEE 15th International Conference on ASIC (ASICON).(Grant Number: 2019YFB2204603) | |
| Jiaxu Zhou, Yichao Lin, Bo Wang, Jing Jin, Shan Wang, Tingting Mo*, “A 24/48 Gb/s NRZ/PAM-4 Dual-Mode Transmitter with 3-tap FFE in 28 nm CMOS”, 2023 IEEE 15th International Conference on ASIC (ASICON). | |
| 2021 | Chenyue Shi, Shengyuan Zhou, and Jing Jin, An Enhanced SSCP for Frequency Drift Suppressing in SSPLL, The IEEE 14th International Conference on ASIC, Oct. 26 – Oct. 29, 2021, Kunming, China.(Grant Number: 2019YFB2204603) |
| 2020 | Yu Xue, Chao Yang, Xiaoming Liu, Jing Jin , A Bandwidth Adjusted PLL for Fast Chirp FMCW Radar Application, 2020 15th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Kunming, pp. 1-3.(Grant Number: 2019YFB2204603.) |
| Mengying Hu, Yuekang Guo, Jing Jin, A VCO-Based Continuous Time Delta-sigma ADC with An Alternative Feedforward Scheme VCO, 2020 15th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Kunming, pp. 1-3.(Grant Number: 61974092) | |
| Wenzheng Wang, Chao Yang, Yuan Liu, Jing Jin, An Extended Range Multi-Modulus Divider with Seamless Switching at Extended Division Boundary, 2020 15th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Kunming, pp. 1-3.(Grant Number: 2019YFB2204603) | |
| Miao Bai, Xiaofei Wang, Jing Jin, Tingting Mo, An Impedance Calibration Method Based on Temperature and Process Monitor for LPDDR5 Interface, 2020 15th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Kunming, pp. 1-3.(Grant Number: 2019YFB2204603) | |
| 2019 | Zhigang Li, Xiaofei Wang, and Jing Jin, A 0.0558-mm2 0.05-0.9GHz Low-Power Multi-phase Non-overlap Clock Generator in 40 nm CMOS, The IEEE 13th International Conference on ASIC, Oct. 29 – Nov. 1, 2019, Chongqing, China. |
| Songhao Guo, Li Ding, and Jing Jin, A 16/32Gb/s NRZ/PAM4 Receiver with Dual-Loop CDR and Threshold Voltage Calibration, The IEEE 13th International Conference on ASIC, Oct. 29 – Nov. 1, 2019, Chongqing, China. | |
| Yu Ji, Li Ding, and Jing Jin, A High-Linear Digital-to-Phase Converter in 40nm CMOS, The IEEE 13th International Conference on ASIC, Oct. 29 – Nov. 1, 2019, Chongqing, China. | |
| Yifei Wang, Xiaofei Wang, Yuekang Guo and Jing Jin, A Low-Power 10-bit 160-MSample/s DAC in 40-nm CMOS, The IEEE 13th International Conference on ASIC, Oct. 29 – Nov. 1, 2019, Chongqing, China. | |
| Yingying Liang, Xiaoming Liu, and Jing Jin, An Optimized Modeling Method for Transformer Design, The IEEE 13th International Conference on ASIC, Oct. 29 – Nov. 1, 2019, Chongqing, China. | |
| 2018 | F. Li, L. Ding and J. Jin, “A 0.032-mm2 Fully-Integrated Low-Power Phase-Locked Loop Based on Passive Dual-Path Loop Filter,” 2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Qingdao, 2018, pp. 1-3. |
| Y. Kong, L. Ding and J. Jin, “A Multiplexed Low Power and High Linearity Cascaded Phase Interpolator Design,” 2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Qingdao, 2018, pp. 1-3. | |
| J. Xue, H. Ghaedrahmati and J. Jin, “A 10-bit 160MS/s SAR ADC with Fast-Response Reference Voltage Buffer,” 2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Qingdao, 2018, pp. 1-3. | |
| X. Lian, P. Hong and T. Mo, “A Low-Power, Regulated Cascode, Low Noise Amplifier in 40nm CMOS for Millimeter-Wave Applications,” 2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Qingdao, 2018, pp. 1-3. | |
| P. Hong, H. Xu and J. Jin, “High resolution TDC and high linearity DTC for all-digital spur calibration,” 2018 IEEE MTT-S International Wireless Symposium (IWS), Chengdu, 2018, pp. 1-3. | |
| H. Ghaedrahmati, J. Xue, J. Jin and J. Zhou, “A 1mW 20MHz Bandwidth 9.51-ENOB Dynamic-Amplifier-Based Noise-Shaping SAR ADC,” 2018 IEEE 2nd International Conference on Circuits, System and Simulation (ICCSS), Guangzhou, 2018, pp. 9-12. | |
| C. Yu, Z. Li, Y. Ji and T. Mo, “A Low Power and Wideband 28-41GHz PLL Design for mm-Wave Applications,” 2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Qingdao, 2018, pp. 1-3. | |
| L. Shu, Y. Liao and T. Mo, “A Novel High-Precision RC Oscillator,” 2018 14th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Qingdao, 2018, pp. 1-3. | |
| Y. Yan, H. Xu and J. Jin, “A High-Speed Pipelined-SAR ADC with Resistor-based Self-biasing RAMP,” 2018 10th International Conference on Communications, Circuits and Systems (ICCCAS), Chengdu, China, 2018, pp. 378-382. | |
| 2017 | S. Yao, L. Liu and J. Jin, “A passive mixer-first receiver with negative feedback for impedance matching,” 2017 IEEE 12th International Conference on ASIC (ASICON), Guiyang, 2017, pp. 804-806. |
| L. Xu, X. Gao and J. Jin, “A high-speed low-power charge pump with dynamic current matching,” 2017 IEEE 12th International Conference on ASIC (ASICON), Guiyang, 2017, pp. 800-803. | |
| A. Fan and J. Jin, “A highly-linearized ring amplifier with gain offset calibration,” 2017 3rd IEEE International Conference on Computer and Communications (ICCC), Chengdu, 2017, pp. 1372-1376. | |
| Y. Wu, J. Jin and K. El-Sankary, “A linearized wideband low noise amplifier in 65nm CMOS for multi-standard RF communication applications,” 2017 3rd IEEE International Conference on Computer and Communications (ICCC), Chengdu, 2017, pp. 812-815. | |
| J. Shi and T. Mo, “A 2.4GHz T/R switch with ESD protection for WLAN 802.11 b/g/n applications,” 2017 IEEE 12th International Conference on ASIC (ASICON), Guiyang, 2017, pp. 545-548. | |
| Cheng Wang, Tingting Mo, “A High Efficiency RF Power Amplifier Using Linearity-Enhanced Method in 40nm Standard CMOS Process”2017 3rd International Conference on Mechanical, Electronic and Information Technology Engineering (ICMITE 2017)，Shanghai，2017，139:00086 | |
| 2016 | Wenxin Wu, Tingting Mo and Zhijian Lu, “A 180nm CMOS three stage feedforward compensation op-amp with linearity improvement technique for active RC LPF,” 2016 10th IEEE International Conference on Anti-counterfeiting, Security, and Identification (ASID), Xiamen, 2016, pp. 91-95. |
| Fa-Ke Xiong and Ting-Ting Mo, “A 2.4GHz CMOS Doherty power amplifier with capacitance compensation technique,” 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Hangzhou, 2016, pp. 415-417. | |
| Rong-Tao Liao, Rui Guan and Ting-Ting Mo, “A directly triggered asynchronous SAR logic with variable delay unit,” 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Hangzhou, 2016, pp. 912-914. | |
| Jia-Wei Chen, Zhi-Jian Lu and Ting-Ting Mo, “A 6th-order Chebyshev active-RC complex filter employing feedforward compensation operational transconductance amplifiers achieving +39.1dBm IIP3,” 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Hangzhou, 2016, pp. 1345-1347. | |
| Han-Jie Ding, Zhi-Jian Lu and Ting-Ting Mo, “A global process variability monitor using sensitivity-enhanced ring oscillators and modified iterative method,” 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Hangzhou, 2016, pp. 1354-1356. | |
| Boyi Zheng, Li Ding and Jing Jin, “A filter enhanced capacitively phase-coupled low noise 0.6-to-3 GHz Ring VCO,” 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Hangzhou, 2016, pp. 1531-1533. | |
| Zikuan Wang, Zhijian Lu and Tingting Mo, “A common source LNTA of high linearity robust to temperature and process,” 2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Hangzhou, 2016, pp. 1561-1563. | |
| S. Lou, Z. Lu, H. Ding and T. Mo, “A mixer-first receiver with a new transimpedance amplifier,” 2017 IEEE 2nd Advanced Information Technology, Electronic and Automation Control Conference (IAEAC), Chongqing, 2017, pp. 342-345. | |
| 2015 | Cheng, L. & Li, P. & Mo, T.T.. (2015). A 1.9 GHZ High Efficiency Class-F SOI CMOS Power Amplifier. 10.2991/cisia-15.2015.66. |
| S. Huang, X. Li and X. Li, “A 14b 1GS/s DAC with SFDR > 80 dBc across the whole nyquist band by mixed total 3-dimesional sort-and-combine and dynamic element matching,” 2015 IEEE 11th International Conference on ASIC (ASICON), Chengdu, 2015, pp. 1-4. | |
| B. Pan, J. Jin and J. Zhou, “A GHz-level ring-counter-based multi-modulus fractional LO divider with on-the-fly tunability,” 2015 IEEE 11th International Conference on ASIC (ASICON), Chengdu, 2015, pp. 1-4. | |
| B. Yang, Z. Lu and J. Zhou, “A 6–13 GHz wide-tuning-range low-phase-noise ring oscillator utilizing frequency multiplication technique,” 2015 IEEE 11th International Conference on ASIC (ASICON), Chengdu, 2015, pp. 1-4. | |
| R. Lu, Z. Lu, et al, “A 4th-order N-path filter in 40nm CMOS with tunable Gm-C stage and reduced center-frequency offset,” 2015 IEEE 11th International Conference on ASIC (ASICON), Chengdu, 2015, pp. 1-4. | |
| S. Hu, et al, “A dual-band frequency tunable complex filter with stable quality-factor in different temperatures,” 2015 IEEE 11th International Conference on ASIC (ASICON), Chengdu, 2015, pp. 1-4. | |
| Q. Chen, et al, “A SFA and I/Q mismatch auto-calibration scheme for high IRR multi-mode GPS RF receiver,” 2015 IEEE 11th International Conference on ASIC (ASICON), Chengdu, 2015, pp. 1-4. | |
| 2014 | Y. Zhou, P. Qin, et al, “Fast and high-precision VCO frequency calibration technique for wide-band frequency synthesizer,” 2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Guilin, 2014, pp. 1-3. |
| R. Zhang, Z. Lu , et al, “A low-power noise-canceling LNA with downward impedance transformer and resistive feedback,” 2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Guilin, 2014, pp. 1-3. | |
| C. Guo, R. Guan, et al, “A 1-G sample/S 71-dB SFDR CMOS S/H circuit,” 2014 12th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT), Guilin, 2014, pp. 1-3. | |
| 2013 | Chaojie Fan, et al, “Digital calibration techniques for interstage gain nonlinearity in pipelined ADCs,” 2013 IEEE 10th International Conference on ASIC, Shenzhen, 2013, pp. 1-4. |
| Xingpeng Pan, Rui Guan, et al, “A CMOS PGA with DCOC and I/Q mismatch calibration,” 2013 IEEE 10th International Conference on ASIC, Shenzhen, 2013, pp. 1-4. | |
| Fan Meng, Rui Guan, et al, “Dual control mode AGC for wireless communication system,” 2013 IEEE 10th International Conference on ASIC, Shenzhen, 2013, pp. 1-4. | |
| Peng Chen, Rui Guan, et al, “AVCO with F-V linearization techniques for CNS application,” 2013 IEEE 10th International Conference on ASIC, Shenzhen, 2013, pp. 1-4. | |
| Yun Chen, Chaojie Fan and Jianjun Zhou, “Low jitter clock driver for high-performance pipeline ADC,” 2013 IEEE 10th International Conference on ASIC, Shenzhen, 2013, pp. 1-4. | |
| Lu Sun, Yuxiao Lu and Tingting Mo, “A 300MHz 10b time-interleaved pipelined-SAR ADC,” 2013 IEEE 10th International Conference on ASIC, Shenzhen, 2013, pp. 1-4. | |
| Zhe Li, Yuxiao Lu and Tingting Mo, “Calibration for split capacitor DAC in SAR ADC,” 2013 IEEE 10th International Conference on ASIC, Shenzhen, 2013, pp. 1-4. | |
| 2012 | J. Kang, X. Yu and J. Zhou, “Optimization of injection locked frequency divider with tunable active inductor,” 2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT), Singapore, 2012, pp. 74-76. |
| T. Tao, C. Fan, et al, “A 1.8V low noise threshold voltage reference generator with temperature and process calibration,” 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Xi’an, 2012, pp. 1-3. | |
| J. Kang, P. Qin, X. Li and T. Mo, “13 GHz programmable frequency divider in 65 nm CMOS,” 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Xi’an, 2012, pp. 1-3. | |
| R. Guan, T. Mo, et al, “12 GHz monolithic double-balanced down converter in 65 nm CMOS,” 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology, Xi’an, 2012, pp. 1-3. | |
| B. Wu and T. Mo, “Barbed transmission lines for crosstalk suppression,” 2012 Asia-Pacific Symposium on Electromagnetic Compatibility, Singapore, 2012, pp. 621-624. | |
| Xu Feng,Mo Tingting ,and Li Jinbo, “High-linearity SiGe Power Amplifier for 2.4 GHz WLAN”, International Conference on Electric Inform ation and Control Engineering (ICEICE), April 2012, pp. 752–755. | |
| 2011 | Xiaobin Shen, Taotao Yan, Yuxiao Lu and Jianjun Zhou, “A 0.25dB gain step high linear programmable gain amplifier,” 2011 9th IEEE International Conference on ASIC, Xiamen, 2011, pp. 1062-1065. |
| Wufeng Wang, Peichen Jiang, Tingting Mo and Jianjun Zhou, “Low noise low power two-stage modulator with injection locked LO divider in 65nm CMOS,” 2011 9th IEEE International Conference on ASIC, Xiamen, 2011, pp. 590-593. | |
| Haiyi Wang, Peichen Jiang, Tingting Mo and Jianjun Zhou, “A low-noise WCDMA transmitter with 25%-duty-cycle LO generator in 65nm CMOS,” 2011 9th IEEE International Conference on ASIC, Xiamen, 2011, pp. 1034-1037. | |
| Hongliang Tian, et al “An area-efficient dual-channel RF receiver for GPS-L1/Galileo-E1/Compass-B1,” 2011 9th IEEE International Conference on ASIC, Xiamen, 2011, pp. 1026-1029. | |
| Hui Wang, Taotao Yan, et al, “A highly linear wideband variable gain CMOS balun-LNA,” 2011 9th IEEE International Conference on ASIC, Xiamen, 2011, pp. 866-869. | |
| J. Jin, X. Liu, P. Qin and J. Zhou, “A ΔΣ fractional-N PLL with fast Auto-Frequency Calibration for CMMB tuners,” 2011 International Symposium on Integrated Circuits, Singapore, 2011, pp. 539-542. | |
| T. T. Yan, X. B. Shen, P. C. Jiang and J. J. Zhou, “A 17.5dBm IIP3 high linear fully differential RF CMOS amplifier,” 2011 IEEE International Conference of Electron Devices and Solid-State Circuits, Tianjin, 2011, pp. 1-2. | |
| P. C. Jiang, T. T. Yan, J. Jin and J. J. Zhou, “A low flicker noise and high IIP2 downconversion mixer for Zero-IF GSM receiver,” 2011 IEEE International Conference of Electron Devices and Solid-State Circuits, Tianjin, 2011, pp. 1-2. | |
| J. Li, T. Mo and F. Xu, “GSM/EDGE Power Amplifier module with improved low-power efficiency,” 2011 International Symposium on Integrated Circuits, Singapore, 2011, pp. 551-554. | |
| B. Wu and T. Mo, “Printed circuit board electrical design for wafer-level packaging,” 2011 12th International Conference on Electronic Packaging Technology and High Density Packaging, Shanghai, 2011, pp. 1-4. | |
| W. Ying, P. Qin, J. Jin and T. Mo, “A 1mW 5GHz current reuse CMOS VCO with low phase noise and balanced differential outputs,” 2011 International Symposium on Integrated Circuits, Singapore, 2011, pp. 543-546. | |
| Lijiong Wang, Tingting Mo, et al, “An auto-calibrating I/Q mismatch scheme for high image rejection GPS RF receiver,” 2011 9th IEEE International Conference on ASIC, Xiamen, 2011, pp. 1054-1057. | |
| T. Tang, T. Mo, et al, “A low-noise amplifier using subthreshold operation for GPS-L1 RF receiver,” 2011 International Conference on Electrical and Control Engineering, Yichang, 2011, pp. 4257-4260. | |
| Y. Yan, T. Yan, T. Mo, et al, “A 62MHz~316MHz Phase-Locked Loop Based on Ring Oscillator for ADC Clock Generator in 0.18m CMOS,” 2011 Third International Conference on Measuring Technology and Mechatronics Automation, Shangshai, 2011, pp. 6-8. | |
| W. Lei, Y. Taotao, M. Tingting and M. Cui, “A 14-b 2MSPS Low Power Sigma-Delta ADC Using Feed-Forward Structure,” 2011 Third International Conference on Measuring Technology and Mechatronics Automation, Shangshai, 2011, pp. 3-5. | |
| 2010 | J. Wu, P. Jiang,et al, “A dual-band LNA with active balun for GNSS receivers,” 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Shanghai, 2010, pp. 665-667. |
| J. Tan, L. Wang, et al , “A frequency auto-tuning complex filter with 48dB gain tuning and 65dB DC-offset rejection,” 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Shanghai, 2010, pp. 451-453. | |
| X. Liu, J. Jin, et al, “Operational amplifiers used in PLL charge pump circuits,” 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Shanghai, 2010, pp. 475-477. | |
| M. Zhou, C. Fan, et al, “A compact automatic gain control loop for GNSS RF receiver,” 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Shanghai, 2010, pp. 284-286. | |
| C. Lu, J. Jin, C. Mao, et al, “Wide band voltage-controlled oscillator for multi-band multi-mode GNSS receivers,” 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology, Shanghai, 2010, pp. 755-757. | |
| Wu, Boping & Chang, Xin & Tsang, Leung & Mo, Tingting. (2010). Fast Electromagnetic Modeling of 3D Interconnects on Chip-package-board. Piers Online. 6. 10.2529/PIERS091212144113. | |
| 2009 | W. Zhang, X. Dai, J. Jin and J. Zhou, “A novel fast-settling ADPLL architecture with frequency tuning word presetting and calibration,” 2009 IEEE 8th International Conference on ASIC, Changsha, Hunan, 2009, pp. 1161-1164. |
| Ran Ren, Taotao Yan, Peichen Jiang, Hao Hu and Jianjun Zhou, “A 1.8V CMOS polar transmitter front-end for 900MHz EDGE system,” 2009 IEEE 8th International Conference on ASIC, Changsha, Hunan, 2009, pp. 395-398. | |
| Yuchun Zhu, Jing Jin, Xiaopeng Yu and Jianjun Zhou, “Optimized system design for fully integrated fractional-N PLL,” Proceedings of the 2009 12th International Symposium on Integrated Circuits, Singapore, 2009, pp. 220-223. | |
| Hao Hu, Taotao Yan, Cui Mao and Jianjun Zhou, “A single ended input wideband variable gain low noise amplifier with balanced differential output and digital AGC for CMMB TV tuner,” Proceedings of the 2009 12th International Symposium on Integrated Circuits, Singapore, 2009, pp. 393-396. | |
| Xuan Dai, Weicheng Zhang, Jing Jin and Jianjun Zhou, “Frequency resolution enhancement for digitally controlled oscillators using series switched varactor,” Proceedings of the 2009 12th International Symposium on Integrated Circuits, Singapore, 2009, pp. 397-400. | |
| P. Qin, J. Jin and C. Mao, “A wideband CMOS LC VCO with low tuning sensitivity for CMMB applications,” 2009 Asia Pacific Conference on Postgraduate Research in Microelectronics & Electronics (PrimeAsia), Shanghai, 2009, pp. 257-260. | |
| C. Fan, Y. Lu and C. Mao, “Design of a Chebyshev low pass filter with automatic frequency calibration,” 2009 Asia Pacific Conference on Postgraduate Research in Microelectronics & Electronics (PrimeAsia), Shanghai, 2009, pp. 121-124. | |
| S. Han, J. Jin and C. Mao, “A full-swing charge pump with zero phase offset,” 2009 Asia Pacific Conference on Postgraduate Research in Microelectronics & Electronics (PrimeAsia), Shanghai, 2009, pp. 298-301. | |
| Z. Pan, P. Jiang, L. Zhang and C. Mao, “Low flicker noise and high linearity passive mixer in 0.18µm CMOS for direct conversion receiver,” 2009 Asia Pacific Conference on Postgraduate Research in Microelectronics & Electronics (PrimeAsia), Shanghai, 2009, pp. 21-24. | |
| L. Zhang, P. Jiang, X. Wang and C. Mao, “A high IIP2 direct down-conversion active mixer calibrated by RLS adaptive filter,” 2009 Asia Pacific Conference on Postgraduate Research in Microelectronics & Electronics (PrimeAsia), Shanghai, 2009, pp. 25-28. | |
| 2006 | D.J. Allstot, C.T. Charles, S. Kodali, X. Li, D. Ozis, J. Paramesh, S. Shekhar, and J.S. Walling, “CMOS Integrated Transformers: Coming of Age,” International Conference on Solid-State and Integrated-Circuit Technology (ICSICT), pp. 1480-1483, October 2006. (Invited) |
| 2004 | D. Ozis, X. Li, J. Paramesh, H. Zarei, and D.J. Allstot, “Building blocks for a 10-GHz band smart antenna receiver in 0.25-um SiGe BiCMOS technology,” IEEE Workshop on Wireless Circuits and Systems (WOWCAS), pp. 43-44, May 2004. |
| 2003 | D.J. Allstot, M. Chu, K. Choi, T. Kim, X. Li, and J. Park, “Parasitic-aware RF IC Design,” International Conference on ASIC (ASICON), Vol. 1, pp. 16-25, October 2003. (Invited) |
| X. Li, D. Ozis, J. Paramesh, H. Zarei, and D.J. Allstot, “A 10-GHz Smart Antenna Receiver in 0.25-um SiGe BiCMOS Technology, ” SRC TECHCON 2003, August 2003. | |
| 2001 | Z. Chen, X. Li, L. Ji, J. Han and S. Yu, “An Improved Low Power CMOS Readout Circuit for Focal Plane Array,” Proc. 4th International Conference on ASIC (ASICON), pp. 854-857, October 2001. |
| 2000 | X. Li, Z. Chen and L. Ji, “A Novel Odd-Even Switch Structure Design of CMOS Snapshot Readout for Focal Plane Array,” World Computer Conference, August 2000. |
| Z. Chen, X. Li and L. Ji, “A 128×128 CMOS Snapshot Readout Circuit for Focal Plane Array,” World Computer Conference, August 2000. | |
| 1998 | X. Li and L. Ji, “Quadra-tree algorithm for transition probability in CMOS IC power estimation,” Proc. 5th International Conference on Solid-State and Integrated Circuit Technology (ICSICT), pp. 492-495, October 1998. |
| 1997 | Jianjun Zhou, R.M. Ziazadeh, H.-H. Ng, H.-T. Ng, and D.J. Allstot, “Charge-Pump Assisted Low-Power/Low-Voltage CMOS Opamp Design,” in Proceedings Int. Symposium on Low Power Electronics and Design (ISLPED), Aug. 1997, pp. 108109. |
美国专利
| 2013 | Jianjun Zhou et. al., “Equivalent radio frequency notch filter, radio frequency chip, and receiver”, US Patent No. 8385873, Feb 26, 2013 |
| 2011 | X. Li, S. Lee and C. Conroy, “Techniques for Improving Amplifier Linearity”, U.S. Patent #7,936,220. |
| X. Li and R. Apte, “ Common-gate Common-source Amplifier ” , U.S. Patent #7,902,923. | |
| 2009 | Xuejun Zhang and Jianjun Zhou, “General-Purpose Wideband Amplifier,” U.S. Patent No. 7602246, Oct. 13, 2009. |
| X. Li and D.J. Allstot, “Receiver with Colpitts Differential Oscillator, Colpitts Quadrature Oscillator, and Common-gate Low Noise Amplifier,” U.S. Patent #7,755,442. (Division of U.S. Patent #7,414,481) | |
| X. Li and D.J. Allstot, “Receiver with Colpitts Differential Oscillator, Colpitts Quadrature Oscillator, and Common-gate Low Noise Amplifier,” U.S. Patent #7,414,481. | |
| 2004 | Jianjun Zhou and Xuejun Zhang, “Temperature and Process Compensation of MOSFET Operating in Sub-Threshold Mode,” U.S. Patent No. 6819183, Nov. 16, 2004. |
| 2003 | Jianjun Zhou, Jon Klaren, and Charlie Persico, “Integrated Power Detector with Temperature Compensation,” U.S. Patent No. 6531860, Mar. 11 2003. |
中国专利
| 2021 | 李予琛*,施尘玥*,叶炀涛*,吴可*,金晶,顾昌展,毛军发,“用于生命体征探测的毫米波雷达系统低功耗实现方法”,专利号CN202110576661.9,申请日2021/5/26 |
| 李予琛*,施尘玥*,叶炀涛*,吴可*,金晶,顾昌展,毛军发,“基于子空间法和DBF的多目标生命体征探测方法”,专利号CN202110576344.7 ,申请日2021/5/26 | |
| 施尘玥*,李予琛*,叶炀涛*,吴可*,顾昌展,金晶,“面向人体监护的小型化非接触雷达系统”,专利号CN202110520117.2 ,2021/5/13 | |
| 吴可*,施尘玥*,叶炀涛*,金晶,顾昌展,周健军,“基于自适应Kalman滤波器的全数字锁相环低噪声数字鉴相器”,专利号CN202110304571.4 ,申请日2021/3/23 | |
| 李予琛*,叶炀涛*,吴可*,顾昌展,金晶,吴林晟,毛军发,“MIMO调频连续波毫米波雷达的4D手势识别方法”,专利号CN202011380551.7 ,申请日2021/3/11 | |
| 2020 | 金晶,许正奇*,刘晓鸣*,周健军,“毫米波低噪声放大器与移相器组合系统优化方法”,专利号CN202011383550.8,申请日2020/12/1 |
| 周健军,杨照霖*,卜染*,金晶,“基于开关电容和有源容阻上变频的高阶N路带通滤波器”,专利号CN202011380551.7 ,申请日2020/12/1 | |
| 2019 | 金晶 王然 过悦康 周健军，“具有校准电路的可调增益动态放大装置及方法”,专利号CN201911265186.2，申请日2019/12/11 |
| 金晶 谢波 刘晓鸣 周健军，“PAM4模式下高速SST驱动器电平不匹配比优化实现方法”专利号CN201911315850.X，申请日2019/12/19 | |
| 金晶 薛宇 刘晓鸣 杨超 周健军，“快速锁频和周跳消除的线性区间拓展的方法”专利号CN201911254886.1，申请日2019/12/10 | |
| 金晶 沈亿万 过悦康 周健军，“分段结构模数转换器增益误差校准装置及方法”专利号CN201911265113.3，申请日2019/12/11 | |
| 金晶 胡梦莹 过悦康 周健军，“适用于模数转化器中环形压控振荡器的PVT数字校准方法”专利号CN201911265149.1，申请日2019/12/11 | |
| 周健军 丁力 刘晓鸣 金晶，“数字相位转换器提高输出线性度的方法”专利号CN201911271911.7，申请日2019/12/12 | |
| 周健军 王霄飞 洪芃力 刘晓鸣 金晶，”应用于低功耗全集成系统级芯片的电源管理系统,“专利号CN201911295799.0，申请日2019/12/16 | |
| 2018 | 刘力僮 金晶 周健军,“一种本振小数分频器及其数字校准方法和电路”,专利号CN201810045406.X,申请日2018/1/17，授权日2020/07/07 |
| 丁力 刘力僮 金晶 周健军,“锁相环电路、多锁相环系统及其输出相位同步方法”,专利号CN201810053079.2,申请日2018/1/17,授权日2021/8/13 | |
| 2016 | 徐利成 刘力僮 潘步堃 金晶 周健军,“中高频多模分频比可调节LO小数分频器”，专利号CN201610210727.1，授权日2019/01/15 |
| 2015 | 卢志坚 周健军, “一种阻抗自举频率转换带通滤波器,” 专利号201510003283X,授权日 2017/12/15 |
| 陈琴 周健军,“IQ不匹配自校准可编程增益放大器、校准方法及应用”, 专利号CN201510233182.1,授权日2018/02/13 | |
| 潘步堃 刘力僮 金晶 周健军,“带数字校准的可变分频比的LO小数分频器及数字校准方法”,专利号CN201510742015.X,授权日2018/01/30 | |
| 卢志坚 潘兴鹏 周健军, “一种变直流低频包络数字检测器,” 专利号201510003276X, 授权日 2017/4/19 | |
| 2014 | 周阳阳 严皓 秦鹏 周健军, “一种频率校准电路及其方法,” 专利号2014103844670, 授权日 2017/2/15 |
| 严皓、周阳阳、秦鹏、周健军, “一种小数分频器”, 专利号201410410175X, 授权日 2017/3/15 | |
| 2012 | 张微成 戴煊 金晶 周健军, “电感电容数控振荡器 ,” 专利号ZL200910195429.X, 授权日2012/9/5 |
| 周健军 何卓彪 杨帆 池毓宋 汪猛 王红玉 刘欣芳 易岷 胡新荣, “等效射频带陷滤波电路、射频芯片及接收机,” 专利号ZL200810227625.6, 授权日 2012/07/04 |